Wakerly, John F. <br/><br/>
Digital design :  principles and practices / 
John F. Wakerly. 
 - 3rd ed. 
 - Upper Saddle River, N.J. :  Prentice Hall,  ℗♭2000. 
 - xxiii. 949 pages :  illustrations ;  25 cm +  2 computer optical discs (4 3/4 in.). 
 - Prentice Hall Xilinx design series .
 - Prentice Hall Xilinx design series. .
<br/><br/>Includes bibliographical references and index. 
<br/><br/>1.1 About Digital Design 1 -- 1.2 Analog versus Digital 3 -- 1.3 Digital Devices 6 -- 1.4 Electronic Aspects of Digital Design 7 -- 1.5 Software Aspects of Digital Design 9 -- 1.6 Integrated Circuits 12 -- 1.7 Programmable Logic Devices 15 -- 1.8 Application-Specific ICs 16 -- 1.9 Printed-Circuit Boards 18 -- 1.10 Digital-Design Levels 18 -- 1.11 Name of the Game 22 -- 1.12 Going Forward 23 -- 2 Number Systems and Codes 25 -- 2.1 Positional Number Systems 26 -- 2.2 Octal and Hexadecimal Numbers 27 -- 2.3 General Positional-Number-System Conversions 29 -- 2.4 Addition and Subtraction of Nondecimal Numbers 32 -- 2.5 Representation of Negative Numbers 34 -- 2.5.1 Signed-Magnitude Representation -- 2.5.2 Complement Number Systems -- 2.5.3 Radix-Complement Representation -- 2.5.4 Two's-Complement Representation -- 2.5.5 Diminished Radix-Complement Representation -- 2.5.6 Ones'-Complement Representation -- 2.5.7 Excess Representations -- 2.6 Two's-Complement Addition and Subtraction 39 -- 2.6.1 Addition Rules -- 2.6.2 A Graphical View -- 2.6.3 Overflow -- 2.6.4 Subtraction Rules -- 2.6.5 Two's-Complement and Unsigned Binary Numbers -- 2.7 Ones'-Complement Addition and Subtraction 44 -- 2.8 Binary Multiplication 45 -- 2.9 Binary Division 47 -- 2.10 Binary Codes for Decimal Numbers 48 -- 2.11 Gray Code 51 -- 2.12 Character Codes 53 -- 2.13  Codes for Actions, Conditions, and States  n-Cubes and Distance  Codes for Detecting and Correcting Errors  Error-Detecting Codes --  Error-Correcting and Multiple-Error-Detecting Codes --  Hamming Codes --  CRC Codes --  Two-Dimensional Codes --  Checksum Codes --  m-out-of-n Codes --  Codes for Serial Data Transmission and Storage  Parallel and Serial Data --  Serial Line Codes --  Digital Circuits  Logic Signals and Gates  Logic Families  CMOS Logic  CMOS Logic Levels --  MOS Transistors --  Basic CMOS Inverter Circuit --  CMOS NAND and NOR Gates --  Fan-In --  Noninverting Gates --  CMOS AND-OR-INVERT and OR-AND-INVERT Gates --  Electrical Behavior of CMOS Circuits  Data Sheets and Specifications --  CMOS Steady-State Electrical Behavior  Logic Levels and Noise Margins --  Circuit Behavior with Resistive Loads --  Circuit Behavior with Nonideal Inputs --  Fanout --  Effects of Loading --  Unused Inputs --  Current Spikes and Decoupling Capacitors --  How to Destroy a CMOS Device --  CMOS Dynamic Electrical Behavior  Transition Time --  Propagation Delay --  Power Consumption --  Other CMOS Input and Output Structures  Transmission Gates --  Schmitt-Trigger Inputs --  Three-State Outputs --  Open-Drain Outputs --  Driving LEDs --  Multisource Buses --  Wired Logic --  Pull-Up Resistors --  CMOS Logic Families  HC and HCT --  VHC and VHCT --  HC, HCT, VHC, and VHCT Electrical Characteristics --  FCT and FCT-T --  FCT-T Electrical Characteristics --  Bipolar Logic  Diodes --  Diode Logic --  Bipolar Junction Transistors --  Transistor Logic Inverter --  Schottky Transistors --  Transistor-Transistor Logic  Basic TTL NAND Gate --  Logic Levels and Noise Margins --  Fanout --  Unused Inputs --  Additional TTL Gate Types --  TTL Families  Early TTL Families --  Schottky TTL Families --  Characteristics of TTL Families --  A TTL Data Sheet --  CMOS/TTL Interfacing  Low-Voltage CMOS Logic and Interfacing  3.3-V LVTTL and LVCMOS Logic --  5-V Tolerant Inputs --  5-V Tolerant Outputs --  TTL/LVTTL Interfacing Summary --  2.5-V and 1.8-V Logic --  Emitter-Coupled Logic  Basic CML Circuit --  ECL 10K/10H Families --  ECL 100K Family --  Positive ECL (PECL) --  Combinational Logic Design Principles  Switching Algebra  Axioms --  Single-Variable Theorems --  Two- and Three-Variable Theorems --  n-Variable Theorems --  Duality --  Standard Representations of Logic Functions --  Combinational-Circuit Analysis  Combinational-Circuit Synthesis  Circuit Descriptions and Designs --  Circuit Manipulations --  Combinational-Circuit Minimization --  Karnaugh Maps --  Minimizing Sums of Products --  Simplifying Products of Sums --  "Don't-Care" Input Combinations -  53 --  2.14  57 --  2.15  58 --  2.15.1  2.15.2  2.15.3  2.15.4  2.15.5  2.15.6  2.15.7  2.16  69 --  2.16.1  2.16.2  3  79 --  3.1  80 --  3.2  84 --  3.3  86 --  3.3.1  3.3.2  3.3.3  3.3.4  3.3.5  3.3.6  3.3.7  3.4  96 --  3.4.2  3.5  99 --  3.5.1  3.5.2  3.5.3  3.5.4  3.5.5  3.5.6  3.5.7  3.5.8  3.6  113 --  3.6.1  3.6.2  3.6.3  3.7  123 --  3.7.1  3.7.2  3.7.3  3.7.4  3.7.5  3.7.6  3.7.7  3.7.8  3.8  135 --  3.8.1  3.8.2  3.8.3  3.8.4  3.8.5  3.9  145 --  3.9.1  3.9.2  3.9.3  3.9.4  3.9.5  3.10  156 --  3.10.1  3.10.2  3.10.3  3.10.4  3.10.5  3.11  166 --  3.11.1  3.11.2  3.11.3  3.11.4  3.12  170 --  3.13  171 --  3.13.1  3.13.2  3.13.3  3.13.4  3.13.5  3.14  175 --  3.14.1  3.14.2  3.14.3  3.14.4  4  193 --  4.1  194 --  4.1.1  4.1.2  4.1.3  4.1.4  4.1.5  4.1.6  4.2  209 --  4.3  215 --  4.3.1  4.3.2  4.3.3  4.3.4  4.3.5  4.3.6  4.3.7 
<br/><br/><br/>System requirements for accompanying computer disc: Windows 95/NT. 
<br/><br/><label>ISBN: </label>0137691912 9780137691913 9780130898968 0130898961 0131111035 9780131111035 0130907723 9780130907721 0130451908 9780130451903 
<br/><br/><label>LCCN: </label>99036681 
<br/><br/><label>Subjects--Topical Terms: </label><br/>Digital integrated circuits--Design and construction.
<br/><br/><label>LC Class. No.: </label>TK7874.65  / .W34 2000