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Integrated Circuit Fabrication.

By: Contributor(s): Material type: TextTextPublisher: Milton : Taylor & Francis Group, 2021Copyright date: �2021Edition: 1st edDescription: 1 online resource (353 pages)Content type:
  • text
Media type:
  • computer
Carrier type:
  • online resource
ISBN:
  • 9781000396447
Subject(s): Genre/Form: Additional physical formats: Print version:: Integrated Circuit FabricationOnline resources:
Contents:
Cover -- Half Title -- Title Page -- Copyright Page -- Dedication Page -- Brief Contents -- Detail Contents -- Preface -- 1. Introduction to Silicon Wafer Processing -- 1.1 Introduction -- 1.2 VLSI Generations -- 1.3 Clean Room -- 1.4 Semiconductor Materials -- 1.5 Crystal Structure -- 1.6 Crystal Defects -- 1.7 Si properties &amp -- its Purification -- 1.8 Single Crystal Si Manufacture -- 1.8.1 Czochralski Crystal Growth Technique -- 1.8.2 Float zone Technique (FZ Technique) -- 1.9 Silicon Shaping -- 1.10 Wafer Processing Considerations -- 1.11 Summary -- Problems -- References -- 2. Epitaxy -- 2.1 Introduction -- 2.2 Liquid Phase Epitaxy -- 2.3 Vapor Phase Epitaxy/Chemical Vapor Deposition -- 2.3.1 Growth Model and Theoretical Treatment -- 2.3.2 Growth Chemistry -- 2.3.3 Doping -- 2.3.4 Reactors -- 2.4 Defects -- 2.5 Technical Issues for Si Epitaxy by CVD -- 2.5.1 Uniformity/Quality -- 2.5.2 Buried Layer Pattern Transfer -- 2.6 Autodoping -- 2.7 Selective Epitaxy -- 2.8 Low Temperature Epitaxy -- 2.9 Physical Vapor Deposition (PVD) -- 2.9.1 Molecular Beam Epitaxy (MBE) -- 2.10 Silcon-on-Insulator (SOI) -- 2.11 Silicon on Sapphire (SOS) -- 2.12 Silicon on SiO2 -- 2.13 Summary -- Problems -- References -- 3. Oxidation -- 3.1 Introduction -- 3.2 Growth and Kinetics -- 3.2.1 Dry Oxidation -- 3.2.2 Wet Oxidation -- 3.3 Growth Rate of Silicon Oxide Layer -- 3.4 Impurities effect on the Oxidation Rate -- 3.5 Oxide Properties -- 3.6 Oxide Charges -- 3.7 Oxidation Techniques -- 3.8 Oxide Thickness Measurement -- 3.9 Oxide Furnaces -- 3.10 Summary -- Problems -- Reference -- 4. Lithography -- 4.1 Introduction -- 4.2 Optical Lithography -- 4.3 Contact Optical Lithography -- 4.4 Proximity Optical Lithography -- 4.5 Projection Optical Lithography -- 4.6 Masks -- 4.7 Photomask Fabrication -- 4.8 Phase Shifting Mask -- 4.9 Photoresist -- 4.10 Pattern Transfer.
4.11 Particle-Based Lithography -- 4.11.1 Electron Beam Lithography -- 4.11.2 Electron-Matter Interaction -- 4.12 Ion Beam Lithography -- 4.13 Ultra Violet Lithography -- 4.14 X-Ray Lithography -- 4.15 Comparison of Lithographic Techniques -- 4.16 Summary -- Problems -- References -- 5. Etching -- 5.1 Introduction -- 5.2 Etch Parameters -- 5.3 Wet Etching Process -- 5.4 Silicon Etching -- 5.5 Silicon Dioxide Etching -- 5.6 Aluminum Etching -- 5.7 Dry Etching Process -- 5.8 Plasma Etching Process -- 5.8.1 Plasma Chemical Etching Process -- 5.8.2 Sputter Etching Process -- 5.8.3 Reactive Ion Etching (RIE) Process -- 5.9 Inductive coupled Plasma Etching (ICP) -- 5.10 Advantages and Disadvantages of Dry Etching (Plasma Etching) and Wet Etching -- 5.11 Examples of Etching Reactions -- 5.12 Liftoff -- 5.13 Summary -- Problems -- References -- 6. Diffusion -- 6.1 Introduction -- 6.2 Atomic Mechanisms of Diffusion -- 6.2.1 Substitutional Diffusion -- 6.2.2 Interstitial Diffusion -- 6.3 Fick's Laws of Diffusion -- 6.4 Diffusion Profiles -- 6.4.1 Constant Source Concentration Distribution -- 6.4.2 Limited Source Diffusion or Gaussian Diffusion -- 6.5 Dual Diffusion Process -- 6.5.1 Intrinsic &amp -- Extrinsic Diffusion -- 6.5.2 Diffusivity of Antimony in Silicon -- 6.5.3 Diffusivity of Arsenic in Silicon -- 6.5.4 Diffusivity of Boron in Silicon -- 6.5.5 Diffusivity of Phosphorus in Silicon -- 6.6 Emitter Push Effect -- 6.7 Field-Aided Diffusion -- 6.8 Diffusion Systems -- 6.9 Oxide Masking -- 6.10 Impurity Redistribution During Oxide Growth -- 6.11 Lateral Diffusion -- 6.12 Diffusion in Polysilicon -- 6.13 Measurement Techniques -- 6.13.1 Staining -- 6.13.2 Capacitance-Voltage Plotting (C-V) -- 6.13.3 Four Point Probe (FPP) -- 6.13.4 Secondary Ion Mass Spectroscopy (SIMS) -- 6.13.5 Spreading Resistance Probe (SRP) -- 6.14 Summary -- Problems -- References.
7. Ion Implantation -- 7.1 Introduction -- 7.2 Ion Implanter -- 7.2.1 Gas System -- 7.2.2 Electrical System -- 7.2.3 Vacuum System -- 7.2.4 Control System -- 7.2.5 Beam Line System -- 7.3 Ion Implant Stop Mechanism -- 7.4 Range and Straggle of Ion Implant -- 7.5 Thickness of Masking -- 7.6 Doping Profile of Ion Implant -- 7.7 Annealing -- 7.7.1 Furnace Annealing -- 7.7.2 Rapid Thermal Annealing (RTA) -- 7.8 Shallow Junction Formation -- 7.8.1 Low Energy Implantation -- 7.8.2 Tilted Ion Beam -- 7.8.3 Implanted Silicides and Polysilicon -- 7.9 High Energy Implantation -- 7.10 Buried Insulator -- 7.11 Summary -- Problems -- References -- 8. Film Deposition: Dielectric, Polysilicon and Metallization -- 8.1 Introduction -- 8.2 Physical Vapor Deposition (PVD) -- 8.2.1 Evaporation -- 8.2.2 Sputtering -- 8.3 Chemical Vapor Deposition (CVD) -- 8.4 Silicon Dioxide -- 8.5 Silicon Nitride -- 8.5.1 Locos Methods -- 8.6 Polysilicon -- 8.7 Metallization -- 8.8 Metallization Application in VLSI -- 8.9 Mettalization Choices -- 8.10 Copper Metallization -- 8.11 Aluminium Metallization -- 8.12 Metallization Processes -- 8.13 Deposition Methods -- 8.14 Deposition Apparatus -- 8.15 Liftoff Process -- 8.16 Multilevel Metallization -- 8.17 Characteristics of Metal Thin Film -- 8.18 Summary -- Problems -- References -- 9. Packaging -- 9.1 Introduction -- 9.2 Package Types -- 9.3 Packaging Design Considerations -- 9.4 Integrated Circuit Package -- 9.5 VLSI Assembly Technologies -- 9.6 Yield -- 9.7 Summary -- Problems -- References -- 10. VLSI Process Integration -- 10.1 Introduction -- 10.2 Fundamental Considerations for IC Processing -- 10.3 NMOS IC Technology -- 10.4 CMOS IC Technology -- 10.4.1 N-Well Process -- 10.4.2 P-Well Process -- 10.4.3 Twin Tub Process -- 10.5 Bipolar IC Technology -- 10.6 Bi-CMOS Technology -- 10.7 Bi-CMOS Fabrication -- 10.8 FinFET.
10.9 Monolithic and Hybrid Integrated Circuits -- 10.10 IC Fabrication / Manufacturing -- 10.11 Fabrication Facilities -- 10.12 Summary -- Problems -- References -- Appendix -- Appendix A Properties of Ge and Si at 300 K -- Appendix B List of Symbols -- Appendix C Useful Physical Constants -- Appendix D Periodic table of the elements and element electronic mass -- Appendix E Some Properties of the Error Function -- Index.
Summary: This book covers theoretical and practical aspects of all major steps in the fabrication sequence. The effect is to give the book an analysis flavor: a number of loosely related topics each with its own background material.Note: T& F does not sell or distribute the Hardback in India, Pakistan, Nepal, Bhutan, Bangladesh and Sri Lanka.
List(s) this item appears in: NEW BOOK 72025
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Cover -- Half Title -- Title Page -- Copyright Page -- Dedication Page -- Brief Contents -- Detail Contents -- Preface -- 1. Introduction to Silicon Wafer Processing -- 1.1 Introduction -- 1.2 VLSI Generations -- 1.3 Clean Room -- 1.4 Semiconductor Materials -- 1.5 Crystal Structure -- 1.6 Crystal Defects -- 1.7 Si properties &amp -- its Purification -- 1.8 Single Crystal Si Manufacture -- 1.8.1 Czochralski Crystal Growth Technique -- 1.8.2 Float zone Technique (FZ Technique) -- 1.9 Silicon Shaping -- 1.10 Wafer Processing Considerations -- 1.11 Summary -- Problems -- References -- 2. Epitaxy -- 2.1 Introduction -- 2.2 Liquid Phase Epitaxy -- 2.3 Vapor Phase Epitaxy/Chemical Vapor Deposition -- 2.3.1 Growth Model and Theoretical Treatment -- 2.3.2 Growth Chemistry -- 2.3.3 Doping -- 2.3.4 Reactors -- 2.4 Defects -- 2.5 Technical Issues for Si Epitaxy by CVD -- 2.5.1 Uniformity/Quality -- 2.5.2 Buried Layer Pattern Transfer -- 2.6 Autodoping -- 2.7 Selective Epitaxy -- 2.8 Low Temperature Epitaxy -- 2.9 Physical Vapor Deposition (PVD) -- 2.9.1 Molecular Beam Epitaxy (MBE) -- 2.10 Silcon-on-Insulator (SOI) -- 2.11 Silicon on Sapphire (SOS) -- 2.12 Silicon on SiO2 -- 2.13 Summary -- Problems -- References -- 3. Oxidation -- 3.1 Introduction -- 3.2 Growth and Kinetics -- 3.2.1 Dry Oxidation -- 3.2.2 Wet Oxidation -- 3.3 Growth Rate of Silicon Oxide Layer -- 3.4 Impurities effect on the Oxidation Rate -- 3.5 Oxide Properties -- 3.6 Oxide Charges -- 3.7 Oxidation Techniques -- 3.8 Oxide Thickness Measurement -- 3.9 Oxide Furnaces -- 3.10 Summary -- Problems -- Reference -- 4. Lithography -- 4.1 Introduction -- 4.2 Optical Lithography -- 4.3 Contact Optical Lithography -- 4.4 Proximity Optical Lithography -- 4.5 Projection Optical Lithography -- 4.6 Masks -- 4.7 Photomask Fabrication -- 4.8 Phase Shifting Mask -- 4.9 Photoresist -- 4.10 Pattern Transfer.

4.11 Particle-Based Lithography -- 4.11.1 Electron Beam Lithography -- 4.11.2 Electron-Matter Interaction -- 4.12 Ion Beam Lithography -- 4.13 Ultra Violet Lithography -- 4.14 X-Ray Lithography -- 4.15 Comparison of Lithographic Techniques -- 4.16 Summary -- Problems -- References -- 5. Etching -- 5.1 Introduction -- 5.2 Etch Parameters -- 5.3 Wet Etching Process -- 5.4 Silicon Etching -- 5.5 Silicon Dioxide Etching -- 5.6 Aluminum Etching -- 5.7 Dry Etching Process -- 5.8 Plasma Etching Process -- 5.8.1 Plasma Chemical Etching Process -- 5.8.2 Sputter Etching Process -- 5.8.3 Reactive Ion Etching (RIE) Process -- 5.9 Inductive coupled Plasma Etching (ICP) -- 5.10 Advantages and Disadvantages of Dry Etching (Plasma Etching) and Wet Etching -- 5.11 Examples of Etching Reactions -- 5.12 Liftoff -- 5.13 Summary -- Problems -- References -- 6. Diffusion -- 6.1 Introduction -- 6.2 Atomic Mechanisms of Diffusion -- 6.2.1 Substitutional Diffusion -- 6.2.2 Interstitial Diffusion -- 6.3 Fick's Laws of Diffusion -- 6.4 Diffusion Profiles -- 6.4.1 Constant Source Concentration Distribution -- 6.4.2 Limited Source Diffusion or Gaussian Diffusion -- 6.5 Dual Diffusion Process -- 6.5.1 Intrinsic &amp -- Extrinsic Diffusion -- 6.5.2 Diffusivity of Antimony in Silicon -- 6.5.3 Diffusivity of Arsenic in Silicon -- 6.5.4 Diffusivity of Boron in Silicon -- 6.5.5 Diffusivity of Phosphorus in Silicon -- 6.6 Emitter Push Effect -- 6.7 Field-Aided Diffusion -- 6.8 Diffusion Systems -- 6.9 Oxide Masking -- 6.10 Impurity Redistribution During Oxide Growth -- 6.11 Lateral Diffusion -- 6.12 Diffusion in Polysilicon -- 6.13 Measurement Techniques -- 6.13.1 Staining -- 6.13.2 Capacitance-Voltage Plotting (C-V) -- 6.13.3 Four Point Probe (FPP) -- 6.13.4 Secondary Ion Mass Spectroscopy (SIMS) -- 6.13.5 Spreading Resistance Probe (SRP) -- 6.14 Summary -- Problems -- References.

7. Ion Implantation -- 7.1 Introduction -- 7.2 Ion Implanter -- 7.2.1 Gas System -- 7.2.2 Electrical System -- 7.2.3 Vacuum System -- 7.2.4 Control System -- 7.2.5 Beam Line System -- 7.3 Ion Implant Stop Mechanism -- 7.4 Range and Straggle of Ion Implant -- 7.5 Thickness of Masking -- 7.6 Doping Profile of Ion Implant -- 7.7 Annealing -- 7.7.1 Furnace Annealing -- 7.7.2 Rapid Thermal Annealing (RTA) -- 7.8 Shallow Junction Formation -- 7.8.1 Low Energy Implantation -- 7.8.2 Tilted Ion Beam -- 7.8.3 Implanted Silicides and Polysilicon -- 7.9 High Energy Implantation -- 7.10 Buried Insulator -- 7.11 Summary -- Problems -- References -- 8. Film Deposition: Dielectric, Polysilicon and Metallization -- 8.1 Introduction -- 8.2 Physical Vapor Deposition (PVD) -- 8.2.1 Evaporation -- 8.2.2 Sputtering -- 8.3 Chemical Vapor Deposition (CVD) -- 8.4 Silicon Dioxide -- 8.5 Silicon Nitride -- 8.5.1 Locos Methods -- 8.6 Polysilicon -- 8.7 Metallization -- 8.8 Metallization Application in VLSI -- 8.9 Mettalization Choices -- 8.10 Copper Metallization -- 8.11 Aluminium Metallization -- 8.12 Metallization Processes -- 8.13 Deposition Methods -- 8.14 Deposition Apparatus -- 8.15 Liftoff Process -- 8.16 Multilevel Metallization -- 8.17 Characteristics of Metal Thin Film -- 8.18 Summary -- Problems -- References -- 9. Packaging -- 9.1 Introduction -- 9.2 Package Types -- 9.3 Packaging Design Considerations -- 9.4 Integrated Circuit Package -- 9.5 VLSI Assembly Technologies -- 9.6 Yield -- 9.7 Summary -- Problems -- References -- 10. VLSI Process Integration -- 10.1 Introduction -- 10.2 Fundamental Considerations for IC Processing -- 10.3 NMOS IC Technology -- 10.4 CMOS IC Technology -- 10.4.1 N-Well Process -- 10.4.2 P-Well Process -- 10.4.3 Twin Tub Process -- 10.5 Bipolar IC Technology -- 10.6 Bi-CMOS Technology -- 10.7 Bi-CMOS Fabrication -- 10.8 FinFET.

10.9 Monolithic and Hybrid Integrated Circuits -- 10.10 IC Fabrication / Manufacturing -- 10.11 Fabrication Facilities -- 10.12 Summary -- Problems -- References -- Appendix -- Appendix A Properties of Ge and Si at 300 K -- Appendix B List of Symbols -- Appendix C Useful Physical Constants -- Appendix D Periodic table of the elements and element electronic mass -- Appendix E Some Properties of the Error Function -- Index.

This book covers theoretical and practical aspects of all major steps in the fabrication sequence. The effect is to give the book an analysis flavor: a number of loosely related topics each with its own background material.Note: T& F does not sell or distribute the Hardback in India, Pakistan, Nepal, Bhutan, Bangladesh and Sri Lanka.

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Electronic reproduction. Ann Arbor, Michigan : ProQuest Ebook Central, 2025. Available via World Wide Web. Access may be limited to ProQuest Ebook Central affiliated libraries.

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